FPGAs: A New Point in the Database Design Space
Authors
- Rene Mueller (ETH Zurich, Switzerland)
- Jens Teubner (ETH Zurich, Switzerland)
Abstract
In line with the insight that “one size” of databases will not fit all application needs, the database community is currently exploring various alternatives to commodity, CPU-based system designs. One particular candidate in this trend are field-programmable gate arrays (FPGAs), programmable chips that allow tailor-made hardware designs optimized for specific systems, applications, or even user queries.
With a focus on database use, this tutorial introduces into FPGA technology, demonstrates its potential, but also pinpoints some challenges that need to be addressed before FPGA-accelerated database systems can go mainstream. The goal of this tutorial is to develop an intuition of an FPGA development cycle, receive guidelines for a “good” FPGA design, but also learn the limitations that hardware-implemented database processing faces. Our more high-level ambition is to spur a broader interest in database processing on novel hardware technology.
About the Authors
Rene Mueller (ETH Zurich, Switzerland)
After an undergraduate degree in electrical engineering, René Müller obtained a MSc in computer science from ETH Zurich. Since 2006, he is a PhD student at ETH Zurich, working on embedded data processing and wireless sensor networks. In his previous work, he developed SwissQM, a virtual machine-based stream processing platform for sensor networks.
Jens Teubner (ETH Zurich, Switzerland)
Graduated with a PhD from TU München in 2006, Jens Teubner worked at the IBM T. J. Watson lab from 2007-2008. Since 2008, he is a postdoc at ETH Zurich, working on hardware-accelerated data processing. Most of his earlier work revolved around scalable XML processing. He was a co-founder of the Pathfinder XQuery compiler project.
Session
EDBT Tutorial: FPGAs: A New Point in the Database Design Space (Thursday, March 25, 14:00—15:30)